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As a more specific question for assembly - Why make ISA be aware of the existence of "stack" concept? - Stack Overflow and suggested by @xiver77, what is the benefit of having a dedicated stack pointer register and instructions for each ISA such as x86 and ARM?

Peter Cordes
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tristone
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  • In the early days, there was no stack. It was implemented in hardware because it was so common to use a stack in software. – tkausl Dec 20 '22 at 02:48
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    It is hardware offering software something handy, without which software would have to resort to less efficient code sequences. – Erik Eidt Dec 20 '22 at 03:44
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    Both x86 and Cortex-type ARM CPUs (early ARM CPUs didn't have a dedicated stack pointer) **need** a dedicated stack pointer because they push data on the stack when a hardware interrupt occurs. This means that data is written onto the stack without software interaction, so the hardware of the CPU must know which register is the stack register. – Martin Rosenau Dec 22 '22 at 20:56
  • @MartinRosenau The ARM has banked stack registers for interrupts. There is nothing in the ISA itself (ARMv5/ARM32) that distinguishes R13 from other registers. It is completely possible to write a bizarro universe ABI that uses some other register as the stack. It is an important point that a pre-emptive scheduler needs space to store context. On Linux, the banked SP values are not used as a stack, they are more like structures to store mode, lr and r0 for transfer to a system stack, which is banked. – artless noise Jan 02 '23 at 19:10

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In instruction encoding (like ARM Thumb), it saves bits on a register-number for the pointer.

In the architecture, it means exception/interrupt semantics can save stuff like FLAGS and return address into memory, instead of needing special registers for it. (Or general-purpose registers that can be clobbered asynchronously.) Another way to handle that is via banked registers, like switching to a special bank of registers for exception handling and maybe putting some values into some of those registers, to avoid messing up the state of the code being interrupted. But that wouldn't work with a higher-priority interrupt interrupting a lower-priority handler.

MIPS doesn't do either of those things; nothing in the ISA has any implicit use of any register-number as a stack pointer, not even its exception / interrupt handling.

Peter Cordes
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    Even if the architecture has no dedicated stack register, the need for an ABI means that in practice, everybody will have to agree to use the same register as a logical stack register anyway, and the specialized stack-like instructions get used with only one destination register anyway in practice, and other instructions (e.g. multiply) never use the stack register. Some designers feel it worth sacrificing orthogonality for instruction encoding space, avoiding the "theoretically legal but useless in practice" instructions. – Raymond Chen Dec 20 '22 at 04:58
  • @RaymondChen: ARM `ldmia` / `stmdb` are useful for memcpy or unrolled loops, at least in some microarchitectures; they were designed well enough to have uses with pointers other than the stack pointer. More often, ISAs just omit having instructions that would only be useful with an SP. (e.g. no push, you should `addiu $sp,$sp, -16` and do multiple `sw` with offsets, so there's only one change to SP for the function.) Or if they have addressing modes that write-back to the pointer register (like PowerPC or AArch64), that's generally useful for looping over arrays. – Peter Cordes Dec 20 '22 at 05:03
  • I'd guess MIPS avoiding having hardware use the stack pointer implicitly was as much about avoiding microcode for exception handling, and avoiding memory access entirely so it couldn't TLB-miss and need to fault to a SW TLB-miss handler in the middle of handling another exception (especially another TLB miss). – Peter Cordes Dec 20 '22 at 05:04
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'The stack' and 'a stack' are different things. Some architecture support generic stacks like ARM32 original, 68K/Coldfire, etc. Stacks are key to deterministic finite automata and form the basis for a lot of computer language theory. In order to accomodate language theory, CPU vendors implement efficient encoding of instructions.

Some languages (Forth) and machines are entirely stack based. See: Wikipedias stack machines for examples.

Some work has been done to separate program data from control flow in tools. This can prevent a 'stack overflow' as an exploit. Return addresses, etc. are stored in a separate stack from program data.

What is the benefit of having a dedicated stack pointer register?

  • It gives an efficient encoding of an extremely common idiom, used extensively by compilers.

However, having a single stack also creates an opportunity for stack overflows as it mixes control and program data in a traditional stack slot. Other mechanics can be used to ensure data can not be over-written on the stack such as extents or 'bounded arrays'. A separate stack for control flow and data can also accomplish a lot without restricting the language.

Efficient encoding of linked lists and other data structures are also important for CPU acceptance. In some ways, this is a kin to a question, like "What is the benefit of using binary?"

artless noise
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  • For some architectures, the stack can be completely separate memory with a different bus. This can allow load/stores to pipeline as a Harvard architecture. Typically only found in microcontrollers. – artless noise Dec 24 '22 at 21:11