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I wonder why register must be only 32.

I know vaguely about the reason but i want to know more exactly.

Peter Cordes
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parabola
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  • What do you mean by "register must be only 32"? This is not a hard limit, neither on the register size (most modern CPUs have registers wider than 32 bits) nor on the number (Itanium had 128 registers). Registers take up valuable transistor real estate on the CPU, and having more of them means more bits are needed to encode them in instructions, so there are diminishing returns from an increased number of registers, but that's all. 32 isn't a magic number. – Jeroen Mostert Sep 14 '22 at 14:28
  • why do you think it must be only 32? which register are you referring to? – TZHX Sep 14 '22 at 14:29
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    Near duplicate of [If registers are so blazingly fast, why don't we have more of them?](https://stackoverflow.com/q/6079215) – Peter Cordes Sep 14 '22 at 17:55
  • Another related question: https://stackoverflow.com/q/59143089/136208 – AProgrammer Sep 15 '22 at 11:53
  • Thank you so much i'm learning about MIPS architecture. – parabola Sep 16 '22 at 09:50

1 Answers1

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Let's look at what we have with 32 general purpose integer-oriented registers, and what would happen if we went to 256 registers:

  1. Diminishing returns

    Normal compiled code demonstrates that with 32 registers, most function leave some of the registers unused.  So, adding more registers than 32 doesn't help most code.

  2. Encoding size

    On a register machine, binary operators like addition, subtraction, comparison, others require three operands: left source, right source, and target.  On a RISC machine, each of these uses a register operand, so that means 3 register operands in one instruction.  This means that 3 x 5 bits = 15 bits are used in such an instruction on a machine with 32 registers.

    If we were to increase the number of registers to, say 256, then we would need 8 bits for each register operand.  That would mean 3 x 8 bits = 24 bits.  Instructions become larger, and this decreases the efficiency of the instruction cache — a critical component to performance.

  3. Many instruction sets do have more than 32 registers

    They add specialized registers, such as a whole second set for floating point, and also another set of extra wide registers for SIMD and vector operations.

    In context, these additional register sets don't necessarily suffer the same code expansion as described above because these additional register sets don't intermix with each other: in other words we can have 32 integer registers and also 32 floating point registers, and still maintain 5 bit register fields in the instructions, because the instructions involved know which register set they are using and don't support mixing of the register sets in the same instruction.

Also, to be clear, many instruction sets have used different numbers of registers, many less than 32 yet some more than 32.

Erik Eidt
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  • You might want to post this on [If registers are so blazingly fast, why don't we have more of them?](https://stackoverflow.com/q/6079215), this question is almost a duplicate of it. – Peter Cordes Sep 14 '22 at 17:56
  • I learned that more registers make clock cycle time longer. I wonder why clock cycle become longer and where registers send electronic signal. – parabola Sep 15 '22 at 07:08
  • With memory,, register file or ram array, for each power of 2 increase in size,, there's another level of address circuity. This is part of the reason that while main memory has gotten so much larger but not commensurately quicker. – Erik Eidt Sep 15 '22 at 10:55