Division and modulo on unsigned integers with 6 registers

Question

I have to find log time algorithm (for a virtual machine) using maximally 6 registers (a,b,c,d,e,f) to divide two unsigned integers N1 and N2( [both are >=0] positive or 0) where if divider is 0 than result is 0 and modulo operation.

• div -> N1/N2
• mod -> N1 % N2

with commands like

• RESET a -> a =0
• ADD a b -> a = a+b
• SUB a b -> a = max(0,a-b)
• SHR a -> a=floor(a/2)
• SHL a -> a=floor(a*2)
• INC a -> a+=1
• DEC a -> a=max(0,a-1)
• JUMP j -> jump to j-th line
• JZERO x j -> if x is 0 than jump to k+j
• JODD x j -> if x is odd than jump to k+j

Are there any algorithms that can help me ?

I can only check if value in reg is ODD or ZERO.

Thank you for help.

Answer 1

Saturating-subtract and jzero allows compare for less-than-or-equal (or greater-than), so you can implement the C version of njuffa's answer on How can I multiply and divide using only bit shifting and adding? which produces quotient and remainder. Since you have non-saturating add, you can implement the wrapping add (and then do manual carry-out detection by checking for wraparound, as Nathan does it in C.)

jodd lets you test the low bit, like if (x&1), which would let you implement the standard multiply algorithm as well. So if you had a division algorithm that only gave you a quotient, you could do remainder = dividend - quotient*divisor with a log-time multiply.

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Other binary division Q&As:

• How can I multiply and divide using only bit shifting and adding? -another answer on the same Q&A, this time using shifts to "align" the most significant bit of the divisor with the dividend before proceeding with schoolbook long division. But it's not clear it's safe without extended-width integers.
• Logarithmic time integer division using bit shift addition and subtraction only
• How can I use bit shifting to replace integer division?
• Divide by 10 using bit shifts? does a multiply in every step, which is only good if you have a fast multiply, or for known constants with few bits set so it only takes a couple shift/add. Another advantage is not requiring a right-shift, but you do have a right shift. (Unlike some toy ISAs)