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I just wanted to ask: why is it that when I write :

MOV DL, [BX]

it works, but when I write:

MOV DL, [AX]

it doesn't?

zx485
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Yasmine11
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  • You haven't provided enough info. What does "it works" mean? Please post more of your code, and explain what you are trying to do. – 1.618 Jun 25 '19 at 18:30
  • First of all thank you for you comment, I will try to be more specific in the future. Well simply, when I press compile with the first instruction,the code is compiled, whereas for the second one an error is reported saying that the parameters are not valid. – Yasmine11 Jun 25 '19 at 18:52
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    @1.618 "It doesn't" here definitely means: "It does not compile." The reason is simple: Unlike the i386, on the i8086 nearly all registers had a special meaning. The "B" in `BX` stands for the word "base", which means that this register can be used for memory addressing (while the **a**ccumulator `AX`, the **c**ounter `CX` and the **d**ata register `DX` can't be used for that). Therefore an instruction `MOV DL, [AX]` does not exist. – Martin Rosenau Jun 26 '19 at 04:26

1 Answers1

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In the current Intel® 64 and IA-32 Architectures Software Developer Manual this is described on page 509 of 4898:

In 16-bit Intel assembly it is impossible to use the AX register for register indirect addressing.

As you can see in the manual, you can use the following registers for indirect addressing; for all of the following registers there are addressing modes that use them on their own (or in base+index pairs):

BX, BP, SI, DI

These can be combined to (with optional displacements)

 [BX+SI]    [BX+SI]+disp8    [BX+SI]+disp16
 [BX+DI]    [BX+DI]+disp8    [BX+DI]+disp16
 [BP+SI]    [BP+SI]+disp8    [BP+SI]+disp16
 [BP+DI]    [BP+DI]+disp8    [BP+DI]+disp16
 [SI]          [SI]+disp8       [SI]+disp16
 [DI]          [DI]+disp8       [DI]+disp16
 disp16        [BP]+disp8       [BP]+disp16
 [BX]          [BX]+disp8       [BX]+disp16

Hence your first instruction (expanded) 

MOV DL, BYTE PTR [BX]

is valid, but your second one isn't, because in the 8086 (x86_16) ISA there is no ModRM addressing-mode encoding for it in x86 machine code.

32-bit and 64-bit addressing modes use a different encoding for addressing modes, with an optional SIB (scale+index+base) byte that allows nearly any combination of base and index (except index=RSP), and with a 2-bit shift count (scale factor) for the index. See Referencing the contents of a memory location. (x86 addressing modes) or the other tables in Intel's manual.

mov DL, [EAX] is valid even in 16-bit mode, but only on 386-compatible CPUs.

Peter Cordes
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zx485
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