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Assume an 8 bit shift register is loaded with the bit pattern 10110101 and that each clock pulse shifts this right one bit. What is the pattern on the shift register outputs after 2 clock pulses?

Assume that the register is a barrel shifter. 

A.11011010
B.01101011
C.01011010
D.10101101

How are the answers above possible?

Logical Shift Right - 2pulse
10110101
01011010 - first pulse
00101101 - second pulse
Rotate Logic Right
10110101
11011010
01101101
Fiddling Bits
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Jerry Sui
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1 Answers1

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It looks like a bad question, but the most plausible answer is D. The bottom 6 bits at least are correct. Also D would be 100% correct iff there is a carry bit, and the barrel shifter is doing a Rotate Right with Carry instruction (RRX in ARM notation). So they may have omitted vital information from the question, or it could just be a typo, but it would seem the least bad answer is D.

(Alternatively it could be any of the other answers, particularly B, with one or more typos.)

Paul R
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  • Can you please elaborate the RRC? To me it seems like in stead of assuming C as carry i have to assume 0. – Jerry Sui Oct 30 '18 at 14:23
  • It's RRX in ARM (RRC or RCR in various other ISAs) - see latest edit above. See also [this answer](https://stackoverflow.com/a/10395112/253056) – Paul R Oct 30 '18 at 14:24