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Some tutorials say that the EFLAGS register is a general purpose register, while other tutorials say that it is not a general purpose register.

So which one is it?!

Peter Cordes
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Steve
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2 Answers2

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No,

It is not because:

  • You cannot directly address it; there is no MOV EFLAGS, Value instruction.
  • You cannot perform calculations using EFLAGS.
  • You cannot specify EFLAGS as an explicit source or destination in any instruction.

In fact, there are only 4 instructions that allow you to address the eflags register as a whole: PUSHF, POPF, SAHF, and LAHF And even these instructions only act upon a limited set of bits within the register.

In fact eflags is as far away from a general purpose register as you can get. It's a special purpose status register.

Johan
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They are not General Purpose Registers. But rather, "Program Status and Control Register" as for Intel's Documentation, Volume A (section 3.4.1, page 73): enter image description here

محمد جعفر نعمة
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    I would even say that `ESP` is not a "general purpose register" because it **must** point to the stack. – Martin Rosenau May 08 '17 at 10:25
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    @MartinRosenau, No it does not, RSP can point to anything. An application can choose to forgo the use of a stack. If it does you can use RSP for any purpose you like. – Johan May 08 '17 at 10:30
  • @Johan The word "general purpose" means that something can be used for any purpose. In fact when CPL=3 the ESP register may have any value - but only as long as you don't use the `call` or `push` instructions! However when CPL=0 ESP must definitely point to the stack: An invalid value in the ESP register (e.g. pointing to a non-mapped address) would definitely cause a CPU reset because of a "triple fault" if any interrupt occurs! (For example an NMI.) This is why I say that ESP is not a "general purpose" register. – Martin Rosenau May 08 '17 at 20:29
  • @Martin Rosenau: `esp` can be encoded as a source or destination in most places a GPR can be encoded so I'd consider it a GPR for this reason. (`esp` cannot be encoded as the index of a 32-bit SIB addressing mode however.) – ecm Jan 31 '22 at 06:05
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    @ecm "GPR" means that a register can be used for anything. If `esp` is a "GPR", it is possible to define a calling convention where the first three integer arguments are passed in registers `ecx`, `esi` and `esp`. The C code `myFunction(1,2,3);` would result in the following assembler code: `mov ecx,1`, `mov esi,2`, `mov esp,3` ... and what's the next instruction? By the way: As long as there is no instruction `lodsd ebx, esi`, even `eax` is not a real "GPR" because there are instructions that implicitly use the `eax` register! – Martin Rosenau Jan 31 '22 at 08:38
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    @ecm As I have written in an answer on [Retrocomputing Stackexchange](https://retrocomputing.stackexchange.com/questions/5121/why-are-first-four-x86-gprs-named-in-such-unintuitive-order#10985), all registers of x86-16 had some "intended purpose" and therefore x86-16 did not have any "GPR" at all. In contrast to this, registers R0-R13 of an ARM-1 or ARM-2 CPU or R1-R30 of MIPS can be used for anything. – Martin Rosenau Jan 31 '22 at 08:58
  • @Martin Rosenau: You're correct, but I specifically listed the encodings that allow to use `esp` as a source or destination, and that I would consider it a GPR *for this reason*. Your example, however, can be made to work with `esp` as a parameter if you use any other GPR as an improvised stack pointer, eg `mov dword [ebx - 4], my_return_address` \ `sub ebx, 4` \ `jmp my_function` \ `my_return_address:` then to return you do `add ebx, 4` \ `jmp near dword [ebx - 4]` =) – ecm Jan 31 '22 at 11:04
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    Re: whether ESP / RSP is a GPR: [Why are rbp and rsp called general purpose registers?](https://stackoverflow.com/a/51347294). I agree with @ecm on this; it can be an operand for `add` so it's a GPR. Also, Intel lists it as a GPR in their manual here and in [How to know if a register is a "general purpose register"?](https://stackoverflow.com/q/45538021) . Re: Martin's "what's the next instruction" in a hypothetical calling convention? `mov [ret_addr], imm32` or `mov eax, imm32`, then `jmp myFunction`. Or use a different reg as a user-space stack pointer and push a return address. – Peter Cordes Nov 07 '22 at 04:17
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    Of course if you invent narrower definitions of GPR, you can exclude everything except maybe some of R8-R15. Some of those definitions are even useful distinctions, like ESP/RSP but unlike anything else. But the fact that it's extremely inconvenient and somewhat inefficient to operate the machine with ESP not being a stack pointer doesn't mean it's not a GPR in the standard sense of having a register-number. – Peter Cordes Nov 07 '22 at 04:20