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I am a beginner in assembly programming and was wondering how many and how much can a single EAX general purpose register can hold. As a beginner it seems there is only one each eax,ebx,etc. registers.

Peter Cordes
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Milan
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2 Answers2

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These are logical register names. You are right in assuming each running thread has a single RAX value valid at any given point in the program (by the way - with hyperthreading this means two per core), but in fact modern HW doesn't hold a single value but multiple ones.

A modern out of order CPU will attempt to perform instructions based on source readiness, so for the next program for e.g.:

mov rax, 1  ; #1
add rax, 2  ; #2
mov rax, 3  ; #3
add rax, 4  ; #4

The CPU can perform instructions #1 and #3 as soon as they're decoded, since they require no dependencies to be fulfilled (and run over the old value in rax). Additionally, instruction #2 can be performed in parallel right afterwards, as each depends only on the preceding instruction. However, to allow that in HW, you need to be able to keep the results in some temporary register - for that they came up with register renaming - instead of calling the result of each operation rax, each instruction will assign a new physical register with some unique ID, and update some global table (often called RAT - register alias table) that rax is now represented by physical register #37 or whatever.

The important part is that the sources must be maintained using the correct versions, so they're also renamed at the same moment. Instruction #2 won't use rax, but instead use the destination of inst #1. Inst #4 will similarly use the result of inst #3. If you accept that the renaming is done in-order, and the aliases are updated correctly, it's easy to see that each translation from logical to physical register name maintains the correct program order.

Therefor, while you have a single "correct" rax register with regards to each instruction alive in the pipeline, this isn't necessarily the same physical register. In a sense, you can say that you have multiple different copies of the logical register, each one valid only until the next write to the same logical name.

Leeor
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    This of course goes into the question of what the OP meant. Architecturally speaking, there is only one such register per thread. Microarchitecturally speaking, this is not necessarily true, as Leeor's answer demonstrates. – Nathan Fellman Jan 19 '14 at 12:37
  • @NathanFellman, agreed, but this may go to explain why having a single copy of each logical register is not a significant limiter in cases like the code example (it is when the compiler runs out of logical registers though) – Leeor Jan 19 '14 at 12:42
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There is one and only one EAX per thread in any modern processor.

The same holds for all of the other architectural registers. While you could say that, for instance, there are 8 MMX registers, what that would mean is that there is one and only MM0, MM1, MM2, etc... until MM7.

Peter Cordes
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Nathan Fellman
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